Edge FPGA Neural Network Accelerator for Real-Time Image Classification
Custom Verilog CNN hardware pipeline on Xilinx Artix-7 executing matrix multiply-accumulate (MAC) units for 500+ FPS digit recognition.
Project Overview
Demonstrates custom silicon architecture for edge AI. Implements an 8-bit quantized convolutional neural network layer directly in hardware RTL using DSP blocks and block RAMs (BRAM), classifying incoming video camera frames with 10x lower latency than traditional microcontrollers.
Demonstrates custom silicon architecture for edge AI. Implements an 8-bit quantized convolutional neural network layer directly in hardware RTL using DSP blocks and block RAMs (BRAM), classifying incoming video camera frames with 10x lower latency than traditional microcontrollers.
Custom Verilog CNN hardware pipeline on Xilinx Artix-7 executing matrix multiply-accumulate (MAC) units for 500+ FPS digit recognition.