FPGA-Based Real-Time Digital Audio Equalizer and FIR Filter Design
128-tap Finite Impulse Response (FIR) digital audio filter implemented in Verilog HDL with real-time graphic equalizer slider controls.
Project Overview
A hardware DSP project for high-fidelity audio. Ingests CD-quality I2S digital audio, passes samples through 128-tap symmetric FIR filter stages synthesized in FPGA hardware multipliers, allowing users to tune bass, midrange, and treble frequency bands without software lag.
A hardware DSP project for high-fidelity audio. Ingests CD-quality I2S digital audio, passes samples through 128-tap symmetric FIR filter stages synthesized in FPGA hardware multipliers, allowing users to tune bass, midrange, and treble frequency bands without software lag.
128-tap Finite Impulse Response (FIR) digital audio filter implemented in Verilog HDL with real-time graphic equalizer slider controls.